Weight-sharing based neural network compression and acceleration
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Published in Optica, 2020
The first work on real-time programmable DMD-based free-space optical neural network accelerator.
Recommended citation: Miscuglio, M., Hu, Z., Li, S., George, J.K., Capanna, R., Dalir, H., Bardet, P.M., Gupta, P. and Sorger, V.J., 2020. Massively parallel amplitude-only Fourier neural network. Optica, 7(12), pp.1812-1819. https://opg.optica.org/optica/fulltext.cfm?uri=optica-7-12-1812&id=444948
Published in ArXiV, 2021
The original channel tiling paper, which proposed a tiling method to significanlty improve the utilization of free-space optical neural network accelerators.
Recommended citation: Li, S., Miscuglio, M., Sorger, V.J. and Gupta, P., 2020. Channel Tiling for Improved Performance and Accuracy of Optical Neural Network Accelerators. arXiv preprint arXiv:2011.07391. https://arxiv.org/pdf/2011.07391.pdf
Published in TinyML Research Symposium (TinyML), 2021
A systolic arrary design that implements bit-serial computation to remove multipliers and make the neural network execution more efficient.
Recommended citation: Li, S., Romaszkan, W., Graening, A. and Gupta, P., 2021. SWIS--Shared Weight bIt Sparsity for Efficient Neural Network Acceleration. arXiv preprint arXiv:2103.01308 https://arxiv.org/pdf/2103.01308.pdf
Published in Conference on Machine Learning and Systems (MLSys), 2022
This paper present a framework to compress neural networks and execute them with arbitrary precision on resource constrained processors through weight sharing, bit-serial computation, and look up tables.
Recommended citation: Li, S. and Gupta, P., 2022. Bit-serial Weight Pools: Compression and Arbitrary Precision Execution of Neural Networks on Resource Constrained Processors. Proceedings of Machine Learning and Systems, 4, pp.238-250. https://proceedings.mlsys.org/paper_files/paper/2022/file/502e4a16930e414107ee22b6198c578f-Paper.pdf
Published in SPIE AI and Optical Data Sciences III, 2022
An invited paper about architecture and optimization of free-space 4F-based optical neural networks, which includes the channel tiling method to improve utilization and the performance comparison and projection.
Recommended citation: Li, S. and Gupta P., 2022, March. 4F optical neural network acceleration: an architecture perspective. In AI and Optical Data Sciences III (Vol. 12019, pp. 77-84). SPIE. https://www.spiedigitallibrary.org/conference-proceedings-of-spie/12019/120190B/4F-optical-neural-network-acceleration-an-architecture-perspective/10.1117/12.2614731.full?SSO=1
Published in Laser & Photonics Reviews, 2022
An improved version of programmable DMD-based free-space optical neural network accelerator, offers more than 10X throughput improvement.
Recommended citation: Hu, Z., Li, S., Schwartz, R.L., Solyanik‐Gorgone, M., Miscuglio, M., Gupta, P. and Sorger, V.J., 2022. High‐Throughput Multichannel Parallelized Diffraction Convolutional Neural Network Accelerator. Laser & Photonics Reviews, p.2200213. https://onlinelibrary.wiley.com/doi/full/10.1002/lpor.202200213
Published in IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2023
An architecture paper for energy-efficient and high-performance JTC-based neural network accelerator.
Recommended citation: Li, S., Yang, H., Wong, C.W., Sorger, V.J. and Gupta, P., 2023, February. Photofourier: A photonic joint transform correlator-based neural network accelerator. In 2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA) (pp. 15-28). IEEE. https://ieeexplore.ieee.org/document/10070931
Published in TinyML Research Symposium (TinyML), 2023
Proposed training optimizations to significantly improve the training time for neural networks to be executed on approximate hardware, including analog computing, stochastic computing, and approximate arithmetic.
Recommended citation: Li, T., Li, S. and Gupta, P., 2023. Training Neural Networks for Execution on Approximate Hardware. arXiv preprint arXiv:2304.04125. https://arxiv.org/pdf/2304.04125.pdf
Published in IEEE/ACM International Symposium on Microarchitecture (MICRO), 2023
Follow up work of PhotoFourier, introduced optical buffer and WDM to further improve power efficiency of JTC-based neural network accelerator.
Recommended citation: Li, S., Yang, H., Wong, C.W., Sorger, V.J. and Gupta, P., 2023, October. ReFOCUS: Reusing Light for Efficient Fourier Optics-Based Photonic Neural Network Accelerator. In Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture (pp. 569-583). https://dl.acm.org/doi/proceedings/10.1145/3613424
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Presented my paper “SWIS – Shared Weight bIt Sparsity for Efficient Neural Network Acceleration” in TinyML Research Symposium (TinyML) 2021. You can watch the presentation here
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Presented my paper “Bit-serial Weight Pools: Compression and Arbitrary Precision Execution of Neural Networks on Resource Constrained Processors” in Conference on Machine Learning and Systems (MLSys) 2022.
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Presented my paper “PhotoFourier: A Photonic Joint Transform Correlator-Based Neural Network Accelerator” in IEEE International Symposium on High-Performance Computer Architecture (HPCA) 2023.
Undergraduate course, University 1, Department, 2014
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Workshop, University 1, Department, 2015
This is a description of a teaching experience. You can use markdown like any other post.